4th - 6th Dec 2026, Bengaluru

IIT Kharagpur - Advanced Semiconductor Packaging Reliability Workshop

IIT Alumni Centre, Bengaluru, In-Person Workshop
Taught by two former Intel quality and reliability leaders and certified by IIT Kharagpur. Learn to build a chip package that will last.

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IIT Kharagpur: Legacy That Nurtures Excellence

India’s First IIT

Established in 1951, IIT Kharagpur is India’s oldest Indian Institute of Technology. For over seven decades, it has shaped engineers and researchers who lead innovation across industry, academia, and technology worldwide.

National and Global Standing

Ranked 5th in Engineering by NIRF 2025, IIT Kharagpur consistently ranked among Asia’s top universities by QS Asia Rankings.

Research That Drives Real-World Impact

Known for high-impact research and strong global citation performance, IIT Kharagpur plays a defining role in advancing areas such as artificial intelligence, computing, and emerging technologies.

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About the Workshop

    India’s packaging plants are coming online, and every new line needs engineers who can prove a package will last. This intensive, in-person programme covers quality, qualification and reliability for advanced packages, chiplets and AI hardware — from industry roadmaps to accelerated stress testing, Weibull statistics and design-for-reliability.

    The programme is led academically by IIT Kharagpur, India’s first IIT, founded in 1951. Every participant who completes all sessions and exercises receives a Certificate of Completion from IIT Kharagpur.

Practitioner-Led. In Person. Certified by IIT Kharagpur.

The Complete Curriculum

From Roadmap to Field: 6 Modules

Industry Roadmap & Advanced Packaging

Module 1

FRIDAY


Topics covered

2.5D and 3D architectures, chiplets, and their yield, cost and reliability trade-offs

Fundamentals of Quality & Reliability

Module 2

SATURDAY

Topics covered

Bathtub curve, cost of failure, and DPM and lifetime goals set from customer needs

Q&R Across the Product Lifecycle

Module 3

SATURDAY

Topics covered

Concept to field deployment, and standardsbased versus knowledge-based qualification

Reliability Evaluation – Part 1

Module 4

SATURDAY

Topics covered

Use conditions, accelerated stress tests, failure mechanisms and failure analysis

Reliability Evaluation – Part 2

Module 5

SUNDAY

Topics covered

Weibull and lognormal statistics, acceleration models and use-condition DPM

Design & Manufacturing for Reliability

Module 6

SUNDAY

Topics covered

DfR, MfR, SPC, field telemetry and critical-issue management

The programme runs from Friday afternoon to Sunday

Afternoon

    Welcome and introductions

    Module 1

    Networking high tea

Programme Faculty

Dr. Shalabh Tandon - Former Senior Director, Quality and Reliability, Intel

27 years

at Intel, 1997 to 2024

4 domains

package, product, test and platform Q&R

PhD

Polymer Science and Engineering, UMass Amherst

Rose from reliability engineer to Senior Director over 27 years in Intel’s high-volume manufacturing

Led product quality and reliability for Intel’s IoT business

Resolved critical product issues with functional, security and supply-chain impact

Trusted adviser to senior executives, technical fellows and customers

Published on package interface strength, packaging analytics, and ADAS packaging and cooling

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Programme Faculty

Ms. Shubhada Sahasrabudhe - Former Principal Engineer, Quality and Reliability, Intel

23 years

at Intel, 2001 to 2024

9 patents

and more than 30 publications

IEEE HIR

Co-chair, Heterogeneous Integration Roadmap, Reliability Chapter

Senior leader in product quality, innovation and technology

Shaped industry-wide quality strategy with data-centre leaders

Co-author, Intel and Meta work on silent data corruption at scale

Expert in quality modelling, test methods and customer quality

ASME 2021 Woman in Engineering award; MS, University of Maryland

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PROGRAMME COORDINATOR, IIT KHARAGPUR

    Prof. Anandaroop Bhattacharya Dean, International Relations, and Prem Prakash Verma Chair Professor, Mechanical Engineering. 12 years in industry at Intel, General Motors and GE research centres; teaches IIT Kharagpur’s NPTEL course on Electronic Packaging and Manufacturing.

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Certification: IIT Kharagpur

A Credential That Carries Weight

Certificate of Completion from IIT Kharagpur

Awarded to every participant who completes all sessions and hands-on exercises.

Led by IIT Kharagpur

IIT Kharagpur leads the programme and awards the certificate. The programme is coordinated by Prof. Anandaroop Bhattacharya, Dean, International Relations, IIT Kharagpur.

Academic Credibility with Industry Relevance (optional)

An IIT-issued credential backed by training from two former Intel quality and reliability leaders.

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Made for Those Who Own

You design, build, test or qualify chip packages

    Package and assembly engineers

    Product and test engineers

    Quality and reliability engineers

    Failure analysis engineers

    Chiplet and heterogeneous integration designers

Why Engineers Choose This Workshop

Slide 1 of 1

100% Practitioner-Led

Built for the Chiplet & AI Era

Faculty for Global Industry Forums

Turn Test Data into Lifetimes

Hands-On Exercises, Not Just Slides

IIT Kharagpur Certified in 2.5 Days

THE VENUE

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IIT Alumni Centre Bengaluru

Built by all 23 IITs and recognised by the Ministry of Education

93,000 sq ft centre in the Electronics City area, opened in 2023

Classroom halls with tables, large screens and full sound

Friday 4 Dec (afternoon) · Saturday 5 Dec · Sunday 6 Dec 2026

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Our Admission Process

Secure your seat in three easy steps. Registrations close 30 November

Eligibility:

 Minimum 3 years of work experience

Programme Fee

Program Fee
INR 75,000*

Reserve your seat

Includes faculty sessions, course material, meals on all days, the venue and the IIT Kharagpur certificate. Accommodation and travel are not included
View Plans
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upGrad Learner Support

Talk to our experts. We are available 7 days a week, 10 AM to 7 PM

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Indian Nationals

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Foreign Nationals

Disclaimer

  1. The above statistics depend on various factors and individual results may vary. Past performance is no guarantee of future results.

  2. The student assumes full responsibility for all expenses associated with visas, travel, & related costs. upGrad does not .